High Performance, Low Power Design:
- 131 Instructions most of which are executed in a single clock cycle
- Up to 20 MIPS throughput at 20 MHz
- 32 x 8 working registers
- 2 cycle multiplier
Memory Includes:
- 32KB of programmable FLASH
- 1KB of EEPROM
- 2KB SRAM
- 10,000 Write and Erase Cycles for Flash and 100,000 for EEPROM
- Data retention for 20 years at 85°C and 100 years at 25°C
- Optional bootloader with lock bits
- In System Programming (ISP) by via bootloader
- True Read-While-Write operation
- Programming lock available for software security
I/O and Package:
- 23 programmable I/O lines
- 28 pin PDIP package
Speed Grades:
- 0-4 MHz at 1.8-5.5V
- 0-10 MHz at 2.7-5.5V
- 0-20 MHz at 4.5-5.5V
Low power consumption mode at 1.8V, 1 MHz and 25°C:
- Active Mode: 0.3 mA
- Power-down Mode: 0.1 μA
- Power-save Mode: 0.8 μA (Including 32 kHz RTC)
Pin Diagram:
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